Deeper Sleep state

Deeper Sleep state (mode) is a low-power state similar to Deep Sleep state. In this state the CPU core maintains its context, core's internal clock and the clock of L2 cache are stopped, and the core may not respond to interrupts and other signals. The core in this state has lower power consumption than in the Deep Sleep mode due to lower core voltage. This state is always entered from the Deep Sleep state.

Deeper Sleep mode was originally implemented in mobile microprocessors (mobile Pentium III-M, mobile Pentium 4-M), but it became a standard feature in the most recent desktop CPU families. In some modern families the CPU may transition from this state to Enhanced Deeper Sleep mode or to Deep Power Down mode.

Last modified: 15 Oct 2013
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