SSE4.2

SSE4.2 consists of 7 instructions that improve performance of text processing and some application-specific operations:

• 4 String and text processing instructions
• 1 instruction used for comparison of packed integer quadwords
• 2 application-targeted accelerator (ATA) instructions:
  • CRC32 - calculates cyclic redundancy check of a block of data
  • POPCNT - improves searching of bit patterns

SSE4.2 is the second part of SSE4 instruction set. SSE4.2 was first introduced in Intel Nehalem core in November 2008. The first AMD CPUs with SSE 4.2 support were launched in October 2011. These processors used Bulldozer micro-architecture.