CPUID information (beta)
| Manufacturer: | Intel |
| CPU Family: | Celeron D |
| Processor Number: | 2.66 GHz |
| Frequency: | 2676 MHz |
| CWID version: | 0.4 |
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| Part number: | |
| S-Spec Number: | |
| Comment: | |
| Submitted by: | |
| Submitted on: | 2012-07-16 06:27:14 |
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| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Celeron(R) CPU 2.66GHz |
| Cores: | 1 |
| Logical processors: | 1 |
| Processor type: | Original OEM Processor |
| CPUID signature: | F49 |
| Family: | 15 (0Fh) |
| Model: | 4 (04h) |
| Stepping: | 9 (09h) |
| TLB/Cache details: | Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 128 entries
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache |
| Cache: |
L1 data |
L1 instruction |
L2 |
| Size: |
16 KB |
12K uops |
256 KB |
| Associativity: |
8-way set associative |
8-way set associative |
4-way set associative |
| Line size: |
64 bytes |
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64 bytes |
| Comments: |
Direct-mapped |
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Non-inclusive Direct-mapped |
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| Instruction set extensions | Additional instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
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FXSAVE/FXRSTORE |
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MONITOR/MWAIT |
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SYSENTER/SYSEXIT |
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| Major features | Other features |
| On-chip Floating Point Unit |
36-bit page-size extensions |
| 64-bit / Intel 64 |
64-bit debug store |
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Advanced programmable interrupt controller |
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CPL qualified debug store |
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Debug store |
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Debugging extensions |
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L1 context ID |
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LAHF / SAHF support in 64-bit mode |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Pending break enable |
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Physical address extensions |
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Self-snoop |
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Thermal monitor |
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Thermal monitor 2 |
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Thermal monitor and software controlled clock facilities |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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xTPR Update Control |
See raw CPUID data
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