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| Instruction set extensions | Additional instructions |
| MMX |
Advanced Bit manipulation |
| AMD extensions to MMX |
CLFLUSH |
| 3DNow! |
CMOV |
| Extensions to 3DNow! |
CMPXCHG16B |
| SSE |
CMPXCHG8B |
| SSE2 |
FXSAVE/FXRSTORE |
| SSE3 |
MONITOR/MWAIT |
| SSE4A |
POPCNT |
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PREFETCH/PREFETCHW |
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RDTSCP |
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SKINIT / STGI support |
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SYSCALL/SYSRET |
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SYSENTER/SYSEXIT |
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| Major features | Other features |
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
100MHz multiplier control |
| NX bit/XD-bit |
128-bit SSE instructions |
| Secure Virtual Machine (Virtualization) |
36-bit page-size extensions |
| PowerNow! / Cool'n'Quiet |
Advanced programmable interrupt controller |
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Debugging extensions |
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Extended APIC space |
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Hardware P-state control |
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Hardware thermal control |
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Instruction based sampling |
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LAHF / SAHF support in 64-bit mode |
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LBR virtualization |
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LOCK MOV CR0 means MOV CR8 |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Misaligned SSE mode |
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Model-specific registers |
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Nested page tables |
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OS visible workaround |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Physical address extensions |
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SVM lock |
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Software thermal control |
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Support for NRIP save |
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THERMTRIP |
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TSC rate is ensured to be invariant across all states |
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Temperature sensor |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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Watchdog timer support |