Intel publishes Itanium 9500 reference manual

In June we reported on several unreleased 9500-series CPUs, spotted in one of Intel's Product Change Notifications (PCN). Later it was confirmed that the processors are upcoming Itanium products, based on not yet released "Poulson" core. The Itaniums were supposed to launch last month, but, as we recently learned, they were delayed until the third quarter. The processors are not announced yet, however some details about them already surfaced on Intel website. Days ago, Intel posted Itanium Processor 9500 Series: Reference Manual, aka Software Development and Optimization Guide, which contains many details about Poulson internal organization. The manual also references 4 SKUs from Itanium 9500 series: 9520, 9540, 9550 and 9560.

As stated in the reference manual, Itanium 9500 microprocessors have up to 8 CPU cores, up to 32 MB inclusive last level cache, 4 full width and 2 half width Quick Path Interconnect links, and dual-channel DDR3 memory controller. Each of the CPU cores has 16 KB instruction and 16 KB data first level caches, as well as 512 KB instruction and 256 KB data mid-level (L2) caches. The memory controller supports DDR3-800 and DDR3-1066 ECC memory. The CPUs incorporate Hyper-Threading and Virtualization technologies, and manufactured on 32nm process. The manual doesn't provide such characteristics, as TDP and clock speeds, however we know processor frequencies from originally published PCN. Itanium 9520 will operate at 1.73 GHz. 9540, 9550 and 9560 models will runs at 2.13 GHz, 2.4 GHz and 2.53 GHz respectively.

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