Some details of Ivy Bridge-EX processors

In September Intel launched first "Ivy Bridge" server processors, and more of them will be released in the coming months. The first "Ivy Bridge" Xeons were E5-1600 v2 and E5-2600 v2 series, designed for single- and dual-socket LGA2011 systems. Manufactured on 22nm technology, these products offered higher or considerably higher overall performance while operating in the same power envelope as the current generation of "Sandy Bridge" server CPUs. More microprocessors, such as Xeon E5-4600 v2 for quad-socket configurations and Xeon E5-2400 v2 for socket 1356, will be introduced next year. Also next year, Intel is going to launch Xeon E7-2800 v2, E7-4800 v2 and E7-8800 v2 enterprise class products, built on Ivy Bridge-EX core. Similar to first generation E7 processors, the v2 CPUs will scale up to 2, 4 or 8 sockets, depending on SKU. The Xeon E7 v2s will provide up to 100% better performance, and they will come with new RAS features.

Based on our somewhat limited information, Xeon E7 server chips integrate up to 15 CPU cores, and up to 37.5 MB of L3 cache. The cores incorporate many advanced Ivy Bridge technologies, including AES instructions, VT-d virtualization and Trusted Execution. Hyper-Threading is also supported, which allows the CPUs to execute up to 30 threads at once. New technologies in E7-x800 v2 processors are OS Guard, formerly known as SMEP (Supervisor Mode Execution Protection), and Secure Key, also known as DRNG, or digital random number generator.

Like older E7s, the v2 parts integrate Quick Path Interconnect (QPI), used for inter-processor communications. The number of QPI links on v2 products was reduced from 4 to 3, however the maximum transfer speed was increased from 6.4 GT/s to 8 GT/s. The links support newer version (v1.1) of the QPI interface.

To interface with memory, the Xeons use an on-chip memory controller with 4 memory channels. Each memory channel is connected to a Scalable Memory Buffer (SMB), that provides two DDR3 interfaces. As a result, the processors effectively have 8 memory channels, each supporting up to 3 DIMMs. This gives up to 24 DIMMs per CPU, as opposed to 16 DIMMs per microprocessor in Sandy Bridge-EX based Xeon E7s. The v2 parts also support faster memory, up to DDR3-1600.

Two new interfaces on E7-2800/4800/8800 v2 chips are Direct Memory Interface 2.0 (DMI 2.0) and PCI-Express 3.0. The DMI 2.0 has 5 GT/s transfer speed, and it is used to talk to Pattsburg chipset. The PCI Express has 32 lanes.

In addition to RAS capabilities, available on current Xeon E7 processors, the v2 CPUs add such features as MCA recovery execution path and PCIe Live Error recovery. Unfortunately, we do not have any details on these technologies.

Xeon E7 CPUs are expected to have 95 Watt, 105 Watt, 130 Watt and 155 Watt TDP. According to a few-months old preliminary SKU listing, the E7-8800 v2 processors will come with 12 and 15 cores, and 130 Watt TDP. There will be also 6-core, 10-core and 12-core frequency optimized parts. The former two will have 155 Watt TDP, and the latter one is a 130 Watt version. Intel also planned one low-power 15-core processor with 105 Watt TDP. The E7-4800 v2 CPUs will have from 6 to 15 cores, with TDP ranging from 105W to 130 Watt. The dual-socket E7-2800 v2 are going to have from 12 to 15 cores, operating in the 105 Watt - 130 Watt range.

Xeon E7 microprocessors will utilize socket R1, which is an LGA socket with 2011 contacts. The CPUs will be launched in Q1 2014.

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There is 1 comment posted


2013-11-06 13:35:18
Posted by: TiGr1982

"as opposed to 16 DIMMs per microprocessor in Sandy Bridge-EX based Xeon E7s"

That's wrong. First gen. Xeon E7 are based on Westmere-EX, not Sandy Bridge. Sandy Bridge was skipped altogether for E7's.

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