| General information | | Type | CPU / Microprocessor | | Family | Intel Mobile Pentium |
| Part number | TT8050290 |
| Frequency (MHz) | 90 |
| Bus speed (MHz) ? | 60 |
| Package | TCP |
| | | Architecture / Microarchitecture / Other | | CPUID | 0525h |
| Core voltage (V) ? | 2.9 |
| I/O voltage (V) | 3.3 |
| Manufacturing stepping | mA1 |
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| Notes on sSpec Q0694 |
- The cB1 stepping is logically equivalent to the C2-step, but on a different manufacturing process. The mcB1 step is logically equivalent to the cB1 step (except it does not support DP, APIC or FRC). The mcB1, mA1, mA4 and mcC0-steps also use Intel's Voltage Reduction Technology and are available in the TCP and/or SPGA package, primarily to support mobile applications. The mxA3 is logically equivalent to the xA3 stepping (except it does not support DP or APIC).
- This processor doesn't have FDIV bug.
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| Related S-Specs |
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