Q45A (Intel Pentium 4 510)
Specifications
| General information |
| Type | CPU / Microprocessor |
| Family | Intel Pentium 4 |
| Processor number ? | 510 |
| Part number | JM80547PE0721M |
| Frequency (GHz) | 2.8 |
| Bus speed (MHz) ? | 533 |
| Package type | 775-land FC-LGA4 |
| Socket type | Socket 775 (LGA775) |
| |
| Architecture / Microarchitecture / Other |
| Processor core | Prescott |
| Manufacturing technology (micron) | 0.09 |
| L2 cache size (KB) ? | 1024 |
| |
| Notes on sSpec Q45A |
- Engineering sample.
- The processor is marked as Q45AES
|
| |
CPU ID (1)
| Intel Pentium 4 510 Q45AES |
|---|
| Part number: | JM80547PE0721M |
| Frequency: | |
|
| Comment: | |
| Submitted by: | CPU-World |
|
| |
| General information |
|---|
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Genuine Intel(R) CPU 2.80GHz |
| Cores: | 1 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | F37 |
| Family: | 15 (0Fh) |
| Model: | 3 (03h) |
| Stepping: | 7 (07h) |
| TLB/Cache details: | Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache |
| Cache: |
L1 data |
L1 instruction |
L2 |
|---|
| Size: |
16 KB |
12K uops |
1 MB |
| Associativity: |
8-way set
associative |
8-way set
associative |
16-way set
associative |
| Line size: |
64 bytes |
|
64 bytes |
| Comments: |
sectored cache |
|
sectored cache |
| |
| Instruction set extensions | Additional instructions |
|---|
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG8B |
| SSE3 |
FXSAVE/FXRSTORE |
| |
MONITOR/MWAIT |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
|---|
| On-chip Floating Point Unit |
36-bit page-size extensions |
| Hyper-Threading Technology |
64-bit debug store |
| |
Advanced programmable interrupt controller |
| |
CPL qualified debug store |
| |
Debug store |
| |
Debugging extensions |
| |
L1 context ID |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Model-specific registers |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Pending break enable |
| |
Physical address extensions |
| |
Self-snoop |
| |
Thermal monitor |
| |
Thermal monitor and software controlled clock facilities |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
