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SL2S5 (Intel Pentium II 333 MHz)

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SL2S5 specifications

General information
TypeCPU / Microprocessor
FamilyIntel Pentium II
Part number80523PX333512
Frequency (MHz)  ? 333
Bus speed (MHz)  ? 66
Package typeSECC 3.00
Socket typeSlot 1
Architecture / Microarchitecture / Other
Core steppingdA1
Next steppingQ436
Next production steppingSL2TV
Processor coreDeschutes
Manufacturing technology (micron)0.25
L2 cache size (KB)  ? 512
Core voltage (V)  ? 2.0 (1.93 - 2.1)
Case temperature (°C)  ? 5 - 65
TagRAM steppingA0
Processor substrate revisionB1
Notes on sSpec SL2S5
  • Cacheable address space supports up to 4 Gbytes.
  • L2 cache supports ECC.

Related S-Spec numbers

In addition to the SL2S5 S-Spec, this processor was also manufactured with a few production and pre-production S-Spec numbers:

SteppingS-Spec 80523PX333512
C1 Q288 +
dA0 SL2KA +
dA1 SL2S5 +
Unknown Q432 +

NOTE: Engineering and qualifications samples are marked with this color

SL2S5 CPUID information

Intel Pentium II 333 SL2S5
Part number:80523PX333512
Frequency:334 MHz
Comment:Deschutes dA1
Submitted by:Neon
General information
Processor type:Original OEM Processor
CPUID signature:651
Family: 6 (06h)
Model: 5 (05h)
Stepping: 1 (01h)
TLB/Cache details:Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Data TLB: 4-MB Pages, 4-way set associative, 8 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries
Instruction TLB: 4-MB Pages, fully associative, 2 entries

Cache: L1 data L1 instruction L2
Size: 16 KB 16 KB 512 KB
Associativity: 4-way set
4-way set
4-way set
Line size: 32 bytes 32 bytes 32 bytes
Instruction set extensionsAdditional instructions
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
  Debugging extensions
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Physical address extensions
  Time stamp counter
  Virtual 8086-mode enhancements

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