SL6VP (Intel Xeon 3.067 GHz)
Specifications
| General information |
| Type | CPU / Microprocessor |
| Family | Intel Xeon |
| Part number | BX80532KE3066D
RK80532KE083512 |
| Processor markings | 3066DP/512/533/1.525 |
| Frequency (GHz) | 3.067 |
| Bus speed (MHz) ? | 533 |
| Package type | 604-pin FC-PGA2/mPGA |
| Socket type | Socket 604 |
| |
| Architecture / Microarchitecture / Other |
| CPUID | 0F29h |
| Core stepping | D1 |
| Qualification sample | QQU5 |
| Previous stepping | SL6GH |
| Processor core | Prestonia |
| Manufacturing technology (micron) | 0.13 |
| L2 cache size (KB) ? | 512 |
| Core voltage (V) ? | 1.525 |
| Case temperature (°C) ? | 73 |
| Processor interposer revision | 01 |
| |
| Notes on sSpec SL6VP |
- The parts are availabla starting from Jun 13, 2003
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| |
CPU ID (1)
| Intel Xeon 3.06 GHz SL6VP |
|---|
| Part number: | RK80532KE083512 |
| Frequency: | 3056 MHz |
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| Comment: | |
| Submitted by: | Dc-Lx-Vi |
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| General information |
|---|
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Xeon(TM) CPU 3.06GHz |
| Cores: | 1 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | F29 |
| Family: | 15 (0Fh) |
| Model: | 2 (02h) |
| Stepping: | 9 (09h) |
| TLB/Cache details: | Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache |
| Cache: |
L1 data |
L1 instruction |
L2 |
|---|
| Size: |
8 KB |
12K uops |
512 KB |
| Associativity: |
4-way set
associative |
8-way set
associative |
8-way set
associative |
| Line size: |
64 bytes |
|
64 bytes |
| Comments: |
sectored cache |
|
sectored cache |
| |
| Instruction set extensions | Additional instructions |
|---|
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG8B |
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FXSAVE/FXRSTORE |
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SYSENTER/SYSEXIT |
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| Major features | Other features |
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| On-chip Floating Point Unit |
36-bit page-size extensions |
| Hyper-Threading Technology |
Advanced programmable interrupt controller |
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Debug store |
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Debugging extensions |
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L1 context ID |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Pending break enable |
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Physical address extensions |
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Self-snoop |
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Thermal monitor |
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Thermal monitor and software controlled clock facilities |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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xTPR Update Control |
