CPU ID (2)
| Intel Pentium 4 3.00 GHz SL6WK |
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| Part number: | RK80532PG080512 |
| Frequency: | 2992 MHz |
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| Comment: | |
| Submitted by: | cocoe |
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| General information |
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| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Pentium(R) 4 CPU 3.00GHz |
| Cores: | 1 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | F29 |
| Family: | 15 (0Fh) |
| Model: | 2 (02h) |
| Stepping: | 9 (09h) |
| TLB/Cache details: | Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache |
| Cache: |
L1 data |
L1 instruction |
L2 |
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| Size: |
8 KB |
12K uops |
512 KB |
| Associativity: |
4-way set
associative |
8-way set
associative |
8-way set
associative |
| Line size: |
64 bytes |
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64 bytes |
| Comments: |
sectored cache |
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sectored cache |
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| Instruction set extensions | Additional instructions |
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| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG8B |
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FXSAVE/FXRSTORE |
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SYSENTER/SYSEXIT |
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| Major features | Other features |
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| On-chip Floating Point Unit |
36-bit page-size extensions |
| Hyper-Threading Technology |
Advanced programmable interrupt controller |
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Debug store |
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Debugging extensions |
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L1 context ID |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Pending break enable |
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Physical address extensions |
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Self-snoop |
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Thermal monitor |
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Thermal monitor and software controlled clock facilities |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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xTPR Update Control |
Our CPUID database has 2 records for this microprocessor. See all submitted records.
Rumor on this stepping
It was rumored that these cpus were "failed" Pentium 4 EE's (Extreme Edition) where the cache memory did not pass validation and was thus disabled.
They tend to overclock very well.
Most (all?) SL6WK have all 30 capacitor spaces filled on the back of the cpu. Also oddly the capacitors are oriented 90degrees off of older Northwood CPU's.
It would be nice if others could validate these claims for accuracy =)
p4 2.0A northwood top + p4 3.0 SL6WK top
Pentium 4SL5YR and SL6WK top
p4 2.0A northwood top + p4 3.0 SL6WK bottom
Pentium 4SL5YR and SL6WK bottom.
left is 4SL5YR, right is 30 capacitor SL6WK. the capacitor "banks" are rotated on the SL6WK.
Capacitors on the Bottom of SL6WK CPUs
Hello I currently have several SL6WK P4 3.0Ghz 512K 800 CPUs where some of them have all 30 capacitors like shown in the picture (maybe those are the EE with faulty L2 cache) but I also have some that have only 12 capacitors on the bottom
Capacitor Count & Spacing
X-X-X I have a SL6WK CPU out of
-X-X- a Gateway laptop with 12
X-X-X capacitors spaced like this.
-XXX
X
SL6WK with 12 capacitors
Here's a picture of a version with 12 capacitors.