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SL9CA (Intel Pentium 4 524)

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SL9CA specifications

General information
TypeCPU / Microprocessor
FamilyIntel Pentium 4
Processor number  ? 524
Part numberHH80547PE0831MM
BX80547PE3066E
Frequency (GHz)  ? 3.067
Bus speed (MHz)  ? 533
Clock multiplier  ? 23
Package type775-land FC-LGA4
Socket typeSocket 775 (LGA775)
 
Architecture / Microarchitecture / Other
CPUID0F49h
Core steppingG1
Processor corePrescott
Manufacturing technology (micron)0.09
L2 cache size (MB)  ? 1
FeaturesEM64T technology  ? 
Execute disable bit  ? 
Hyper-Threading technology
Core voltage (V)  ? 1.25 - 1.4
Case temperature (°C)  ? 67.7
 
Notes on sSpec SL9CA
  • Microprocessors with this S-Spec have multiple VIDs.
  • This S-spec supports the 775_VR_CONFIG_04A (mainstream) guidelines for processors with Iccmax up to 78A, and VID up to 1.4V.
  • The processor was produced in limited quantities and is no longer available for purchase.

Related S-Spec numbers

In addition to the SL9CA S-Spec, this processor was also manufactured with one production S-Spec number:

SteppingS-Spec HH80547PE0831MM BX80547PE3066E
G1 SL8ZZ + +
SL9CA + +

SL9CA CPUID information

Intel Pentium 4 524 SL9CA
Part number:HH80547PE0831MM
Frequency:2043 MHz
Comment:
Submitted by:CPU-World
 
General information
Vendor:GenuineIntel
Processor name (BIOS): Intel(R) Pentium(R) 4 CPU 3.06GHz
Cores:1
Logical processors:2
Processor type:Original OEM Processor
CPUID signature:F49
Family:15 (0Fh)
Model: 4 (04h)
Stepping: 9 (09h)
TLB/Cache details:Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache

Cache: L1 data L1 instruction L2
Size: 16 KB 12K uops 1 MB
Associativity: 8-way set
associative
8-way set
associative
8-way set
associative
Line size: 64 bytes   64 bytes
Comments: sectored cache   sectored cache
 
Instruction set extensionsAdditional instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
  FXSAVE/FXRSTORE
  MONITOR/MWAIT
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Hyper-Threading Technology CPL qualified debug store
  Debug store
  Debugging extensions
  L1 context ID
  LAHF / SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Physical address extensions
  Self-snoop
  Thermal monitor
  Thermal monitor 2
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Virtual 8086-mode enhancements
  xTPR Update Control

Our CPUID database has 2 records for this microprocessor. See all submitted records.

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