 |
News · Chips · Information · Forum · Links · About |
|---|---|
| Identification · Pinouts · S-Spec numbers · Glossary | |
SL9DV (Intel Core Duo T2250)
Specifications
| General information | |
| Type | CPU / Microprocessor |
| Family | Intel Core Duo |
| Processor number ? | T2250 |
| Part number | LF80539GE0302M |
| Processor markings | LF80539 T2250 1.73/2M/533 |
| Frequency (GHz) | 1.733 |
| Bus speed (MHz) ? | 533 |
| Clock multiplier ? | 13 |
| Package type | 478-pin Micro-FCPGA |
| Socket type | Socket M |
| Architecture / Microarchitecture / Other | |
| CPUID | 06E8h |
| Core stepping | C0 |
| Next stepping | QQJL |
| Next production stepping | SL9JJ |
| Manufacturing technology (micron) | 0.065 |
| Number of cores | 2 |
| L2 cache size (MB) ? | 2 |
There are no notes on sSpec SL9DV | |
CPU ID (2)
| Intel Core Duo T2250 SL9DV | |||||||||
|---|---|---|---|---|---|---|---|---|---|
|
| ||||||||
| General information | |
|---|---|
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Genuine Intel(R) CPU T2250 @ 1.73GHz |
| Cores: | 2 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 6E8 |
| Family: | 6 (06h) |
| Model: | 14 (0Eh) |
| Stepping: | 8 (08h) |
| TLB/Cache details: | 64-byte Prefetching Data TLB: 4-KB Pages, 4-way set associative, 128 entries Data TLB: 4-MB Pages, 4-way set associative, 8 entries Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries Instruction TLB: 4-MB Pages, fully associative, 2 entries |
| Cache: | L1 data | L1 instruction | L2 |
|---|---|---|---|
| Size: | 32 KB | 32 KB | 2 MB |
| Associativity: | 8-way set associative |
8-way set associative |
8-way set associative |
| Line size: | 64 bytes | 64 bytes | 64 bytes |
| Instruction set extensions | Additional instructions | ||
|---|---|---|---|
| MMX | CLFLUSH | ||
| SSE | CMOV | ||
| SSE2 | CMPXCHG8B | ||
| SSE3 | FXSAVE/FXRSTORE | ||
| MONITOR/MWAIT | |||
| SYSENTER/SYSEXIT | |||
| Major features | Other features | ||
| On-chip Floating Point Unit | Advanced programmable interrupt controller | ||
| NX bit/XD-bit | Debug store | ||
| Enhanced SpeedStep | Debugging extensions | ||
| Digital Thermal Sensor capability | |||
| Machine check architecture | |||
| Machine check exception | |||
| Memory-type range registers | |||
| Model-specific registers | |||
| Page attribute table | |||
| Page global extension | |||
| Page-size extensions (4MB pages) | |||
| Pending break enable | |||
| Perfmon and Debug capability | |||
| Physical address extensions | |||
| Self-snoop | |||
| Thermal monitor | |||
| Thermal monitor 2 | |||
| Thermal monitor and software controlled clock facilities | |||
| Time stamp counter | |||
| Virtual 8086-mode enhancements | |||
| xTPR Update Control | |||
Our CPUID database has 2 records for this microprocessor. See all submitted records.
| Terms and Conditions · Privacy Policy · Contact Us | (c) Copyright 2003 - 2010 Gennadiy Shvets |
Search CPU-World
Identify part
Where to buy
Related S-Specs
Find Core Duo S-Spec numbers with:
Socket type
What is the socket type for this processor?