SL9SA (Intel Core 2 Duo E6300)
Specifications
| General information |
| Type | CPU / Microprocessor |
| Family | Intel Core 2 Duo |
| Processor number ? | E6300 |
| Part number | HH80557PH0362M BX80557E6300 |
| Processor markings | 1.86GHZ/2M/1066/06 |
| Frequency (GHz) | 1.867 |
| Bus speed (MHz) ? | 1066 |
| Clock multiplier ? | 7 |
| Package type | 775-land FC-LGA6 |
| Socket type | Socket 775 (LGA775) |
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| Architecture / Microarchitecture / Other |
| CPUID | 06F6h |
| Core stepping | B2 |
| Next stepping | QUHG |
| Next production stepping | SL9TA |
| Processor core | Conroe |
| Manufacturing technology (micron) | 0.065 |
| Number of cores | 2 |
| L2 cache size (MB) ? | 2 |
| Features | EM64T technology ? Enhanced SpeedStep technology ? Execute disable bit ? Extended Halt state Thermal Monitor 2 Virtualization technology |
| Core voltage (V) ? | 0.85 - 1.3625 |
| Case temperature (°C) ? | 61.4 |
| Thermal Design Power (Watt) ? | 65 |
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There are no notes on sSpec SL9SA |
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CPU ID (1)
| Intel Core 2 Duo E6300 SL9SA |
| Part number: | HH80557PH0362M |
| Frequency: | |
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| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Core(TM)2 CPU 6300 @ 1.86GHz |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 6F6 |
| Family: | 6 (06h) |
| Model: | 15 (0Fh) |
| Stepping: | 6 (06h) |
| TLB/Cache details: | 64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries |
| Cache: |
L1 data |
L1 instruction |
L2 |
| Size: |
32 KB |
32 KB |
2 MB |
| Associativity: |
8-way set associative |
8-way set associative |
8-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
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| Instruction set extensions | Additional instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
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MONITOR/MWAIT |
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SYSENTER/SYSEXIT |
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| Major features | Other features |
| On-chip Floating Point Unit |
36-bit page-size extensions |
| 64-bit / Intel 64 |
64-bit debug store |
| NX bit/XD-bit |
Advanced programmable interrupt controller |
| Intel Virtualization |
CPL qualified debug store |
| Enhanced SpeedStep |
Debug store |
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Debugging extensions |
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Digital Thermal Sensor capability |
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LAHF/SAHF support in 64-bit mode |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Pending break enable |
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Perfmon and Debug capability |
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Physical address extensions |
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Self-snoop |
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Thermal monitor |
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Thermal monitor 2 |
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Thermal monitor and software controlled clock facilities |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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xTPR Update Control |