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SL9SH (Intel Core 2 Duo T5500)

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SL9SH specifications

General information
TypeCPU / Microprocessor
FamilyIntel Core 2 Duo Mobile
Processor number  ? T5500
Part numberLF80537GF0282M
BX80537T5500
Processor markingsLF80537 T5500
1.66/2M/667
Frequency (GHz)  ? 1.667
Frequency in LFM mode (GHz)1
Bus speed (MHz)  ? 667
Clock multiplier  ? 10
Package type478-pin micro-FCPGA
Socket typeSocket M
 
Architecture / Microarchitecture / Other
CPUID06F6h
Core steppingB2
Next steppingQUGG
Next production steppingSL9U4
Manufacturing technology (micron)0.065
Number of cores2
L2 cache size (MB)  ? 2
FeaturesEM64T technology  ? 
Enhanced SpeedStep technology  ? 
Execute disable bit  ? 
Thermal Monitor 2
Core voltage (V)  ? 1.075 - 1.25
Core voltage in LFM mode (V)0.85 - 0.95
Case temperature (°C)  ? 100
Thermal Design Power (Watt)  ? 34
 
There are no notes on sSpec SL9SH

Related S-Spec numbers

In addition to the SL9SH S-Spec, this processor was also manufactured with a few production and pre-production S-Spec numbers:

SteppingS-Spec LF80537GF0282M BX80537T5500
B2 QTBW +  
SL9SH + +
G0 SLGFK +  
L2 QUGC +  
QUGG +  
SL9U4 +  
Unknown QQCL +  
QRHW +  
QWNW +  

NOTE: Engineering and qualifications samples are marked with this color


SL9SH CPUID information

Intel Core 2 Duo Mobile T5500 SL9SH
Part number:LF80537GF0282M
Frequency:1662 MHz
Comment:
Submitted by:hungaryblu
 
General information
Vendor:GenuineIntel
Processor name (BIOS):Intel(R) Core(TM)2 CPU T5500 @ 1.66GHz
Cores:2
Logical processors:2
Processor type:Original OEM Processor
CPUID signature:6F6
Family: 6 (06h)
Model:15 (0Fh)
Stepping: 6 (06h)
TLB/Cache details:64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries

Cache: L1 data L1 instruction L2
Size: 2 x 32 KB 2 x 32 KB 2 MB
Associativity: 8-way set
associative
8-way set
associative
8-way set
associative
Line size: 64 bytes 64 bytes 64 bytes
Comments: Direct-mapped Direct-mapped Non-inclusive
Direct-mapped
Shared between all cores
 
Instruction set extensionsAdditional instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
SSSE3 FXSAVE/FXRSTORE
  MONITOR/MWAIT
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Enhanced SpeedStep CPL qualified debug store
  Debug store
  Debugging extensions
  Digital Thermal Sensor capability
  LAHF/SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Perfmon and Debug capability
  Physical address extensions
  Self-snoop
  Thermal monitor
  Thermal monitor 2
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Virtual 8086-mode enhancements
  xTPR Update Control

Our CPUID database has 3 records for this microprocessor. See all submitted records.

Comments

Intel Core 2 Duo Mobile

2008-01-26 00:45:08
Posted by: GEHOVA GONZALEZ

Intel Core 2 Duo Mobile

Intel Processor SL9SH

2009-11-27 20:39:12
Posted by: Regie Fajardo

Intel Processor SL9SH

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