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SLBLF (Intel Xeon X3440)

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SLBLF specifications

General information
TypeCPU / Microprocessor
FamilyIntel Xeon
Processor number  ? X3440
Part numberBV80605002517AQ
BX80605X3440
Frequency (GHz)  ? 2.533
Frequency in IDA mode (GHz)2.933
Clock multiplier  ? 19
Package type1156-land FC-LGA8
Socket typeSocket 1156 (LGA1156)
 
Architecture / Microarchitecture / Other
CPUID106E5h
Core steppingB1
Processor coreLynnfield
Manufacturing technology (micron)0.045
Number of cores4
L2 cache size (MB)  ? 1
L3 cache size (MB)8
FeaturesEM64T technology  ? 
Enhanced SpeedStep technology  ? 
Execute disable bit  ? 
Hyper-Threading technology
MMX
SSE
SSE2
SSE3
SSE4
SSSE3
Trusted Execution technology
Turbo Boost technology
Virtualization technology (VT-d)
Virtualization technology (VT-x)
Core voltage (V)  ? 0.7 - 1.4
Case temperature (°C)  ? 72.7
Thermal Design Power (Watt)  ? 95
 
Notes on sSpec SLBLF
  • This part has Enhanced Halt State enabled.
  • Demand Based Switching
  • Supports DDR3-800, DDR3-1066 and DDR3-1333 memory.
  • Direct Memory Interface speed is 2.5 GT/s.
  • This part includes Turbo Boost Technology. Maximum performance increase in Turbo Boost mode is 133 MHz for 4 and 3 cores, 266 MHz for 2 cores, and 400 MHz for 1 core.
  • The CPU supports ECC memory.
  • The part is discontinued. Last order date is December 28, 2012. Last shipment date for OEM processors is December 6, 2013.

Related S-Spec numbers

In addition to the SLBLF S-Spec, this processor was also manufactured with one pre-production S-Spec number:

SteppingS-Spec BV80605002517AQ BX80605X3440
B1 Q3AS +  
SLBLF + +

NOTE: Engineering and qualifications samples are marked with this color


SLBLF CPUID information

Intel Xeon X3440 SLBLF
Part number:BV80605002517AQ
Frequency:2533 MHz
Comment:A+
Submitted by:MSTTjio
 
General information
Vendor:GenuineIntel
Processor name (BIOS):Intel(R) Xeon(R) CPU X3440 @ 2.53GHz
Cores:4
Logical processors:8
Processor type:Original OEM Processor
CPUID signature:106E5
Family: 6 (06h)
Model:30 (01Eh)
Stepping: 5 (05h)
TLB/Cache details:64-byte Prefetching
Data TLB0: 2-MB or 4-MB pages, 4-way set associative, 32 entries
Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Instruction TLB: 2-MB or 4-MB pages, fully associative, 7 entries
Instruction TLB: 4-KB pages, 4-way set associative, 64 entries
Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries

Cache: L1 data L1 instruction L2 L3
Size: 4 x 32 KB 4 x 32 KB 4 x 256 KB 8 MB
Associativity: 8-way set
associative
4-way set
associative
8-way set
associative
16-way set
associative
Line size: 64 bytes 64 bytes 64 bytes 64 bytes
Comments: Direct-mapped Direct-mapped Non-inclusive
Direct-mapped
Inclusive
Direct-mapped
Shared between all cores
 
Instruction set extensionsAdditional instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
SSSE3 FXSAVE/FXRSTORE
SSE4.1 MONITOR/MWAIT
SSE4.2 POPCNT
  RDTSCP
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Hyper-Threading Technology CPL qualified debug store
Intel Virtualization Debug store
Intel Trusted Execution technology Debugging extensions
Turbo Boost Digital Thermal Sensor capability
Enhanced SpeedStep LAHF/SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Perfmon and Debug capability
  Physical address extensions
  Self-snoop
  TSC rate is ensured to be invariant across all states
  Thermal monitor
  Thermal monitor 2
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Virtual 8086-mode enhancements
  xTPR Update Control

Our CPUID database has 2 records for this microprocessor. See all submitted records.

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