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SR05R (Intel Pentium G620)

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SR05R specifications

General information
TypeCPU / Microprocessor
FamilyIntel Pentium Dual-Core
Processor number  ? G620
Part numberCM8062301046304
BX80623G620
BXC80623G620
Frequency (GHz)  ? 2.6
Clock multiplier  ? 26
Package type1155-land FC-LGA10D
Socket typeSocket 1155 (LGA1155)
 
Architecture / Microarchitecture / Other
Core steppingQ0
Processor coreSandy Bridge
Manufacturing technology (micron)0.032
Number of cores2
L2 cache size (KB)  ? 512
L3 cache size (MB)3
FeaturesEM64T technology  ? 
Enhanced SpeedStep technology  ? 
Execute disable bit  ? 
MMX
SSE
SSE2
SSE3
SSE4
SSSE3
Virtualization technology (VT-x)
Case temperature (°C)  ? 69.1
Thermal Design Power (Watt)  ? 65
 
Notes on sSpec SR05R
  • The part supports DDR3-1066 memory.
  • Direct Memory Interface speed is 5 GT/s.
  • Frequency of integrated graphics controller in turbo mode is 1100 MHz.
  • Integrated graphics controller runs at 850 MHz.

Related S-Spec numbers

In addition to the SR05R S-Spec, this processor was also manufactured with one pre-production S-Spec number:

SteppingS-Spec CM8062301046304 BX80623G620 BXC80623G620
Q0 Q1FY +    
SR05R + + +

NOTE: Engineering and qualifications samples are marked with this color


SR05R CPUID information

Intel Pentium Dual-Core G620 SR05R
Part number:CM8062301046304
Frequency:2608 MHz
Comment:
Submitted by:CPU-World
 
General information
Vendor:GenuineIntel
Processor name (BIOS): Intel(R) Pentium(R) CPU G620 @ 2.60GHz
Cores:2
Logical processors:2
Processor type:Original OEM Processor
CPUID signature:206A7
Family: 6 (06h)
Model:42 (02Ah)
Stepping: 7 (07h)
TLB/Cache details:64-byte Prefetching
Data TLB0: 2-MB or 4-MB pages, 4-way set associative, 32 entries
Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L2 TLB: 1-MB, 4-way set associative, 64-byte line size
Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries

Cache: L1 data L1 instruction L2 L3
Size: 2 x 32 KB 2 x 32 KB 2 x 256 KB 3 MB
Associativity: 8-way set
associative
8-way set
associative
8-way set
associative
12-way set
associative
Line size: 64 bytes 64 bytes 64 bytes 64 bytes
Comments: Direct-mapped Direct-mapped Non-inclusive
Direct-mapped
Inclusive
Shared between all cores
 
Instruction set extensionsAdditional instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
SSSE3 FXSAVE/FXRSTORE
SSE4.1 MONITOR/MWAIT
SSE4.2 PCLMULDQ
  POPCNT
  RDTSCP
  SYSENTER/SYSEXIT
  XSAVE/XRESTORE states
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Intel Virtualization CPL qualified debug store
Enhanced SpeedStep Debug store
  Debugging extensions
  Digital Thermal Sensor capability
  LAHF/SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Perfmon and Debug capability
  Physical address extensions
  Power Limit Notification capability
  Process context identifiers
  Self-snoop
  TSC rate is ensured to be invariant across all states
  Thermal monitor
  Thermal monitor 2
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Timestamp counter deadline
  Virtual 8086-mode enhancements
  xTPR Update Control

Our CPUID database has 2 records for this microprocessor. See all submitted records.

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