| View previous topic :: View next topic |
| Author |
Message |
monoxrom
Joined: 05 Sep 2008
Posts: 357
Location: Ukraine. Ivano-Frankivsk
|
 Posted: Thu Jan 29, 2009 3:15 am Post subject: Silicon plates |
 |
|
Got several days ago:
Silicon plates with crystals chips
6 big "chips" on each plate is a test chips, established to determine the defective chips |
|
| Back to top |
|
 |
kosmokrator
Joined: 03 Jul 2008
Posts: 4085
Location: Athens-GR
|
| Posted: Thu Jan 29, 2009 3:46 am Post subject: |
|
|
any close up on die????
nice waffers btw! |
|
| Back to top |
|
|
el_gecko
Joined: 25 May 2005
Posts: 1553
Location: Nice, France
|
| Posted: Thu Jan 29, 2009 5:44 am Post subject: |
|
|
So the different chips on the wafers are used to test the wafer? They can target the defective chips?
_________________
My microprocessor collection: The Gecko's CPU Library |
|
| Back to top |
|
|
iguana
Joined: 24 Apr 2007
Posts: 2456
Location: Ottawa, Canada
|
| Posted: Thu Jan 29, 2009 6:31 am Post subject: |
|
|
Nice wafers!
Ahh... Ivano-Frankivsk, Rodon...
Now I see where are wafers promised to me.
No answer till now from Rodon.
OK, at least they are not thrown out 
_________________
My Want List: http://www.cpu-world.com/forum/viewtopic.php?t=22729
Soviet chips info and my own collection: www.cpu-ukraine.com
Last edited by iguana on Thu Jan 29, 2009 8:12 am; edited 1 time in total |
|
| Back to top |
|
|
kosmokrator
Joined: 03 Jul 2008
Posts: 4085
Location: Athens-GR
|
| Posted: Thu Jan 29, 2009 7:15 am Post subject: |
|
|
| iguana_kiev wrote: | Nice wafers!
Ahh... Ivano-Frankivsk, Rodon...
Now I see where are wafers promised to me.
No answer till now from Rodon.
OK, al least they are not thrown out |
lol!!!! |
|
| Back to top |
|
|
chip68
Joined: 19 Oct 2004
Posts: 1024
Location: Central Pennsylvania
|
| Posted: Fri Jan 30, 2009 11:24 pm Post subject: |
|
|
"6 big "chips" on each plate is a test chips, established to determine the defective chips"
Actually, those are used to check layer alignment and characterize the electrical properties of each wafer, to make sure the processing is within spec. Individual chips are tested after the wafer's been diced.
- CMW |
|
| Back to top |
|
|
Wizzard1
Joined: 05 Nov 2006
Posts: 930
Location: Boston MA USA
|
| Posted: Sat Jan 31, 2009 12:33 am Post subject: |
|
|
Electrical properties are marked by the missing secton on the perimeter, not the chips  |
|
| Back to top |
|
|
el_gecko
Joined: 25 May 2005
Posts: 1553
Location: Nice, France
|
| Posted: Sat Jan 31, 2009 4:59 am Post subject: |
|
|
Thanks guys for precision
_________________
My microprocessor collection: The Gecko's CPU Library |
|
| Back to top |
|
|
chip68
Joined: 19 Oct 2004
Posts: 1024
Location: Central Pennsylvania
|
| Posted: Sun Feb 01, 2009 9:04 am Post subject: |
|
|
"Electrical properties are marked by the missing secton on the perimeter, not the chips"
Huh?? The flat side of the wafer's edge has to do with the silicon ingot's crystal orientation.
- CMW |
|
| Back to top |
|
|
D.8080
Joined: 03 Apr 2006
Posts: 1474
Location: Italy
|
| Posted: Sun Feb 01, 2009 9:21 am Post subject: |
|
|
"Scotty... energize..."
Looks like electronic dirty talk
Really cool wafers, look great on a wall! |
|
| Back to top |
|
|
donutty
Joined: 16 Feb 2008
Posts: 1122
|
| Posted: Sun Feb 01, 2009 10:41 am Post subject: |
|
|
| The flat parts are for the polarization of the dilithium matrix! Surely everybody knows that... |
|
| Back to top |
|
|
chip68
Joined: 19 Oct 2004
Posts: 1024
Location: Central Pennsylvania
|
| Posted: Sun Feb 01, 2009 11:41 am Post subject: |
|
|
Exactly.
- CMW |
|
| Back to top |
|
|
Wizzard1
Joined: 05 Nov 2006
Posts: 930
Location: Boston MA USA
|
|
| Back to top |
|
|
|
![[ Hidden ]](https://cdn.cpu-world.com/forum/templates/CPUWorld/images/lang_english/icon_email.gif "[ Hidden ]"){kind=icon}
