| View previous topic :: View next topic |
| Author |
Message |
crusty_dog

Joined: 03 Apr 2015 Posts: 103 Location: Australia / Singapore
|
|
| Back to top |
|
 |
Vlasta

Joined: 15 May 2012 Posts: 2565
|
Posted: Wed Aug 26, 2015 9:00 pm Post subject: |
|
|
Interesting stuff. _________________ best rgds.
Steve |
|
| Back to top |
|
 |
Vlasta

Joined: 15 May 2012 Posts: 2565
|
Posted: Wed Aug 26, 2015 9:04 pm Post subject: |
|
|
Question - why a toroidal architecture and not a hypercube? _________________ best rgds.
Steve
Last edited by Vlasta on Wed Aug 26, 2015 9:20 pm; edited 1 time in total |
|
| Back to top |
|
 |
crusty_dog

Joined: 03 Apr 2015 Posts: 103 Location: Australia / Singapore
|
Posted: Wed Aug 26, 2015 11:36 pm Post subject: |
|
|
Development cost & power consumption are the main reasons. Low power consumption was a higher design priority than processing power
This paper gives some background on different methods used to simulate neural networks
https://www.ics.uci.edu/~jmoorkan/pub/gpusnn-ijcnn.pdf
Excerpt
Most previous efforts on accelerating SNN simulations have mapped large-scale SNNs on distributed
computers, or on dedicated hardware architectures [15][23]. Some of the earliest work used hyper-cubic
parallel computers for modeling SNNs based on I&F neurons [15][18]. Existing SNN simulators such as
NEST, PCSIM (see [2] for more details on spiking neuron simulations) have demonstrated a parallel version
that runs on simple clusters [16][17]. The IBM C2 simulator demonstrated a rat-scale cortical simulation
(55 Million neurons with 442 Billion synapses) using a Blue-Gene supercomputer having more than
32K processors [9]. Unfortunately the cost and development time make these approaches impractical for
general purpose, large-scale simulations. The neuromorphic community has also built dedicated hardware
for simulating SNNs. The Stanford Neurogrid [13] approach simulates one million neurons using a multi-chip
array, with each chip simulating 65K neurons. Vogelstein et al. [19] has demonstrated a multi-chip SNN
system using an analog integrate-and-fire neuron chip (with 4800 neurons) and an FPGA for storing the
synaptic weights (4 Million synapses). Even though the performance and power efficiency of these dedicated
hardware approaches is superior to other techniques, the dedicated hardware approach suffers from limited
programmability, and high-cost. SpiNNaker [22] deploys an application specific parallel processor
interconnected by a network-on-chip communication fabric, resulting in an approach that combines the
performance and ease of programmability for realizing SNNs; our GPU approach is general purpose and
some of the techniques can be applied directly on the SpiNNaker chip. To the best of our knowledge,
our work is the first to demonstrate a general purpose approach for simulation of biologically realistic spiking
neural networks using the CUDA GPU platform. Although prior work exists in applying older generation GPUs
for simulating spiking neural networks [20][21], most of these previous approaches use simple
integrate-and-fire neurons, and are without biologically realistic neural network features (such as STDP and
axonal conduction delay). Adding these features into the SNN simulation is essential for generating various
brain dynamics; and these features make the model memory bandwidth intensive. |
|
| Back to top |
|
 |
|