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CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
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Neon_WA

Joined: 08 Nov 2008 Posts: 7146 Location: Margaret River, West Australia
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Posted: Tue Aug 14, 2012 10:56 pm Post subject: |
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JIO
JBUS to PCI Bridge ASIC
JIO is a companion core-logic ASIC to the Sparc III i-series 64-bit SPARC V9 CPU.
JIO and Sparc IIIi communicate through a split transaction 16-byte shared address/
data bus, which is known as Jbus. The central task of JIO is to be the point of access
to I/O, graphics, and system interrupts, for a uni-processor up to a four-way
symmetric multi-processor Sparc IIIi-based system. For those familiar with the Intel
system hardware partitioning, JIO is the equivalent of an Intel Northbridge, minus
the interface to main-memory. The interface to main-memory comes directly off the
Sparc IIIi CPU in our case. It is allowable for a given system to be configured with
more than one JIO, if added I/O bandwidth is desired.
The JIO ASIC contains these major logical components:
n Jbus Interface Unit
n PCI Interface Unit
n Graphics Interface Unit
n PCI I/O Cache Unit
n Graphics I/O Cache Unit
n Synchronizer Unit
Sun datasheet _________________ There are 10 types of people in this world:
those who understand binary and those who don't. ~Author Unknown
http://www.x86-guide.net/Neon-WA/en/collection.html |
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