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aberco

Joined: 05 Sep 2013 Posts: 2655 Location: Paris France
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Posted: Sun Sep 18, 2016 8:35 pm Post subject: HP PA-RISC NS2 30MHz board |
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Dear all,
I have this super nice early HP PA-RISC NS2 board, NMOS, runs at 30MHz.
Pretty much as good as it gets.
HP PA-RISC NS2 30MHz board $150
There will be no price drop on this one!
Free shipping to AVICC! |
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isa-d

Joined: 16 Aug 2006 Posts: 2984 Location: Italy
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Posted: Mon Sep 19, 2016 10:56 am Post subject: |
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| This is a NS-1 CPU board, not NS-2 |
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CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
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aberco

Joined: 05 Sep 2013 Posts: 2655 Location: Paris France
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Posted: Mon Sep 19, 2016 12:21 pm Post subject: |
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No this is NS2 clearly, see NS1 below.
NS2 has more cache and Weitek FPU.
Date code, 89-90 also correspond to NS2. |
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isa-d

Joined: 16 Aug 2006 Posts: 2984 Location: Italy
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Posted: Mon Sep 19, 2016 1:09 pm Post subject: |
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HP used two container for NS-1 CPU (round top with one or two screws and rectangular top with two screws) with the same number of pins ( 272, http://www.openpa.net/pa-risc_processor_pa-early.html#ns-1 ) and same part number (1FJ5-xxxx)
over the years there was various configurations of these CPU boards, some was semplified
NS-2 used only one container (rectangular top with two or four screws) with 408 pins ( http://www.openpa.net/pa-risc_processor_pa-early.html#ns-2 ) and 1FM5-xxxx part number.
Containers for NS-1 (rounded or rectangular) was used also for various controllers on other boards, not only for CPU boards |
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aberco

Joined: 05 Sep 2013 Posts: 2655 Location: Paris France
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Posted: Mon Sep 19, 2016 1:44 pm Post subject: |
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There's quite a bit of information that don't match on openpa though, so I think a review based on actual boards would be helpful. They say:
NS1: MIU (math interface unit), controls three third-party floating point (FP) chips (ADD, MUL and DIV)
NS2: FPC (floating point controller), controls two third-party floating point (FP) chips (ADD, MULTI)
I note that my boards calls it FPC and not MIU. Also my boards have ~1MB L1 cache.
Last, NS2 has both types of packages, round top and rectangular top. I have yet to see a NS1 with rectangular top.
I am not basing my identification over the type of package, but over the date, number of chips, and architecture.
You have a misconception of HP P/N too, where the first half correspond to the part, and the second half correspond to the revision. In fact, HP technicians do not bother to write the second half with a marker when parts are hand marked. This is true for major designs like CPUs. other common parts like HP rebranded 74 series logic don't have the revision number rule.
Therefore, a NS2 board is fitted with:
1FJ5-0005 CPU
1FK9-0001 SIUN
1FG6-0003 TCU
1FG3-0005 CCU (x2)
1MF2-0002 FPC
1FE1-0001 CLK
Weitek 2264 MUL
Weitek 2265 ALU
My chips have 271 pins, OpenPA forgot to subtract the missing key pin.
Now because NS2 is a minor improvement over the NS1 design I would suspect the packages to have the same pin counts. In fact NS2 share some HP P/N with NS1 for the CCU for example.
The higher 408 pin count is for PCX. |
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aberco

Joined: 05 Sep 2013 Posts: 2655 Location: Paris France
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Posted: Thu Sep 22, 2016 11:49 pm Post subject: |
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| Last chance before someone snaps it on eBay |
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