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CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
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frag_
Joined: 17 Nov 2008 Posts: 4015 Location: Estonia
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Posted: Sat Mar 24, 2018 5:05 pm Post subject: |
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Neat!
Things get even more complicated with two and three ring buses,
making cores measurably non equal for latency sensitive tasks. |
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CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
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Posted: Sat Mar 24, 2018 5:07 pm Post subject: |
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| frag_ wrote: | Neat!
Things get even more complicated with two and three ring buses,
making cores measurably non equal for latency sensitive tasks. |
Was looking at some die pics for later CPUs and was thinking that haha _________________ New for 2025! The CPU Shack has a co-processor!
Visit The CPU Shack of microprocessor history and information. |
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max1024

Joined: 15 Jan 2015 Posts: 636 Location: Belarus
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Posted: Sun Mar 25, 2018 7:27 am Post subject: |
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Interesting story )) Sandy Bridge was firts great core on modern times. Its very progressive and fast core, all other derivatives of it. I'm write there on i7 2600K and do not plan upgrade it in near future, but may be on 2700K
John you must find suitable lga2011 board and run them )) |
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rjluna2
Joined: 27 Oct 2014 Posts: 1302 Location: Hiram, GA, USA
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Posted: Mon Mar 26, 2018 7:09 am Post subject: |
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That is an interesting concept that Intel developed to validate the dies before packaging  |
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