[UCA] Sneak peek for 2019 !
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xsecret



Joined: 01 Feb 2004
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PostPosted: Tue Aug 14, 2018 1:24 pm    Post subject: Reply with quote

I just bought a 486 DX-50 NOS from john Smile

But the same problem will pop up again: I don't really want to start a non-ES CPU collection. So I will probably need a betatester with a lot of different 80186-80486 in hand and willing to spend some time testing them. Wink

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debs3759



Joined: 18 Jan 2006
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PostPosted: Tue Aug 14, 2018 1:33 pm    Post subject: Reply with quote

I have quite a few 386, 387 and 486 plus a few 5x86. I wouldn't say a lot when compared to John though Smile

I have plenty of free time for testing.

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H3nrik V!



Joined: 15 Apr 2014
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Location: Denmark

PostPosted: Tue Aug 14, 2018 2:19 pm    Post subject: Reply with quote

xsecret wrote:

H3nrik V! wrote:
Will it run 50 MHz bus also?


I don't know, but unlikely. One week ago, I was unable to go higher than a 10 MHz bus without write memory corruption. Three days ago, I find a trick to reach 25 MHz, but with insane frequencies inside the FPGA (400 MHz). Yesterday, I finally found what's wrong with the design and tested a new address decoder. Now it works just fine with a DX2-66 or a DX4-100 at 33 MHz, and the maximum clock inside the FPGA is limited to 66 MHz.

Unfortunately, I don't have a 486 with a 40 or 50 MHz bus to try right now Sad But I will try to find one ASAP. Signal integrity might be an issue, especially with a 50 MHz bus.

Yeah, the signal integrity would be a concern, especially when using a daughter board as the unevitable shift in impedance going from board to board could mess up a lot ..
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xhoba



Joined: 20 Apr 2009
Posts: 4596
Location: Picardie, France

PostPosted: Tue Aug 14, 2018 2:28 pm    Post subject: Reply with quote

xsecret wrote:
I just bought a 486 DX-50 NOS from john Smile

But the same problem will pop up again: I don't really want to start a non-ES CPU collection. So I will probably need a betatester with a lot of different 80186-80486 in hand and willing to spend some time testing them. Wink


I could help when I'll be back in France (around mid-october)...

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xsecret



Joined: 01 Feb 2004
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Location: France

PostPosted: Tue Aug 14, 2018 2:40 pm    Post subject: Reply with quote

debs3759 wrote:
I have quite a few 386, 387 and 486 plus a few 5x86. I wouldn't say a lot when compared to John though Smile

I have plenty of free time for testing.


xhoba wrote:
[I could help when I'll be back in France (around mid-october)...


Thanks! That will be useful.

H3nrik V! wrote:
Yeah, the signal integrity would be a concern, especially when using a daughter board as the unevitable shift in impedance going from board to board could mess up a lot ..


Very true. I try to keep signal trace as short as possible, but it's not always possible. Much more decoupling caps can also help. I only have 4 tantalum & 8x 100 nF ceramic caps for the entire CPU right now. But this very early PCB has been only designed as a proof of concept with a 16 MHz max clock in mind Smile

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xsecret



Joined: 01 Feb 2004
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Location: France

PostPosted: Tue Aug 14, 2018 2:48 pm    Post subject: Reply with quote

Just found a nice Am486DX2-80NV8T. Configured the PLL for 40 MHz bus, and after eliminating a crosstalk in a adjacent signal, it seems to works fine! Twisted Evil

Interesting stuff:

CPUID@BOOT: 0x432
eFLAGS (after CPUID enable attempt): 0x2

Seems it doesn't support the CPUID instruction.

PS : No way to run it at 100/50 MHz, but the debug connectors and logic analyzer plugged add a lot of noise.

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debs3759



Joined: 18 Jan 2006
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PostPosted: Tue Aug 14, 2018 3:18 pm    Post subject: Reply with quote

How did you test the Xeon you posted in another thread if the max fsb is so low? Is that planned to be released in the distant future?
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xsecret



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PostPosted: Tue Aug 14, 2018 3:32 pm    Post subject: Reply with quote

You can access the System Management Bus (Identification ROM, thermal sensors, etc.) without booting the CPU. It's a nice feature, but only available on "true" Xeon.
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xsecret



Joined: 01 Feb 2004
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Location: France

PostPosted: Tue Aug 14, 2018 4:22 pm    Post subject: Reply with quote

I could not resist any longer and I was brave enough (or stupid enough) to plug some of my DX2-66 ES on the alpha PGA UCAS. Twisted Evil



Good news : all of them work properly! I grabbed some informations about four or them :



The Intel "Internal Samples Only" CPUID is 0x433. It doesn't support the CPUID instruction. So it's basically a B1-Step, similar to the commercial SX645. Would have expected an A-Step, but nope.

The Q0652 supports CPUID instruction with CPUID = 0x436. Late DX2, ES counterpart for SX955 (w/ Write-back).

The SYE36 ES is basically the same than the "Internal Sample Only" : no CPUID instruction support with CPUID = 0x433.

The AMD A80486DX-66NV8T don't support CPUID instruction and ID itself as 0x432.

I also found near them on the tray one blank 486 that I have never been able to identify. It don't boot on a 486 motherboard. Can't remember where does it come from, but probably a Journey kit.



Plugged on the UCA, it worked for 2-3 seconds @ 8 MHz before crashing horribly with multiple failures. But it was enough to grab ID information. This is indeed a 486 that supports CPUID instruction and ID itself as 0x480. So it's a defective early DX4-100 (without WB).

Interesting investigation... Razz

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Neology



Joined: 25 May 2011
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PostPosted: Mon Aug 20, 2018 8:55 am    Post subject: Reply with quote

You are very "brave enough" to put your ES on ! Very Happy
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