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max1024
Joined: 15 Jan 2015
Posts: 636
Location: Belarus
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 Posted: Sat Oct 13, 2018 11:58 am Post subject: |
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Some Socket 8 based mainboards can set 75Mhz FSB  |
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CPUShack
Joined: 16 Jun 2003
Posts: 34259
Location: State of Jefferson, USA
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| Posted: Sat Oct 13, 2018 12:47 pm Post subject: |
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| max1024 wrote: | | Some Socket 8 based mainboards can set 75Mhz FSB |
They were hopin Intel would make something faster I guess
a 225MHz or 263MHz ppro would be cool
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ph4nt0m
Joined: 01 Jan 2018
Posts: 812
Location: Europe
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| Posted: Sun Nov 11, 2018 2:54 pm Post subject: |
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I have modded finally one of my PPro's. This 256K one could do Memtest and Speedsys running 266MHz @ default 3.3V which was good definitely. Although not good enough to run anything really stressful even with a voltage increase to 3.4V or 3.5V. So it was surgery time. No, it has nothing to do with delidding 
You know there are empty pads on top of golden PPro's with either 256K or 512K L2 cache. These are actually for industry standard 0612 low inductance ceramic capacitors aka LICC. Not sure about capacitance Intel engineers intended to install there back in 1995. Most likely about 100nF each, but it doesn't matter anyway these days. Have to be X7R 125°C. I think I could order some 4.7uF ones for half a dollar each, but I wasn't in a waiting mood. A dead Socket 370 P3 Coppermine with 1.0uF caps was just fine for this purpose. I'm not going to run out of these any time soon. Transplantation complete and the modded PPro runs everything now 266MHz @ 3.4V. Success! |
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frag_
Joined: 17 Nov 2008
Posts: 4015
Location: Estonia
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| Posted: Sun Nov 11, 2018 6:33 pm Post subject: |
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Good job!
I remember once I saw photo of PPro ES with soldered capacitors. But can't find it now. |
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xsecret
Joined: 01 Feb 2004
Posts: 1846
Location: France
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ph4nt0m
Joined: 01 Jan 2018
Posts: 812
Location: Europe
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| Posted: Sun Nov 11, 2018 8:40 pm Post subject: |
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| xsecret wrote: | | Capacitors with higher values can't filter high frequency ripple. I would try with 2x 10 nF - 2x 100 nF - 1x 4.7 µF. |
If the type size is the same, they will generate parallel resonance with impedance peaks. Second, those 1.0uF 0612 are a good choice because their impedance bottoms near 0.1 ohm @ 10MHz and rises due to ESL to 1 ohm @ 300MHz, so lower capacitance will just store less energy while having the same impedance at high frequency. I think these caps are doing much better job on this PPro than on a 1GHz P3 they have been pulled from. Intel put 12 identical pieces there to avoid resonance issues. They switched from LICC to IDC in Tualatins which was a good move for 1GHz+ speeds. |
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H3nrik V!
Joined: 15 Apr 2014
Posts: 1246
Location: Denmark
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| Posted: Tue Nov 13, 2018 4:13 am Post subject: |
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| ph4nt0m wrote: | | xsecret wrote: | | Capacitors with higher values can't filter high frequency ripple. I would try with 2x 10 nF - 2x 100 nF - 1x 4.7 µF. |
If the type size is the same, they will generate parallel resonance with impedance peaks. Second, those 1.0uF 0612 are a good choice because their impedance bottoms near 0.1 ohm @ 10MHz and rises due to ESL to 1 ohm @ 300MHz, so lower capacitance will just store less energy while having the same impedance at high frequency. I think these caps are doing much better job on this PPro than on a 1GHz P3 they have been pulled from. Intel put 12 identical pieces there to avoid resonance issues. They switched from LICC to IDC in Tualatins which was a good move for 1GHz+ speeds. |
I would agree with xsecret on this one. Actually the trick is to find the capacitor with the impedance bottom as close to the 266MHz as possible. Designing hardware, we often use some "bulk" capacity i.e. 1uF and higher, as well as decoupling capacity, typically in the range of 100 nF, but on very critical circuits, 10 or 1 nF is also used. If possible, I would go for a mix like xsecret suggest. |
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ph4nt0m
Joined: 01 Jan 2018
Posts: 812
Location: Europe
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| Posted: Tue Nov 13, 2018 8:05 am Post subject: |
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| If you mix different capacitor values of the same ESL, you get a trouble like this one. The figure is from the Electromagnetic Compatibility Engineering by Henry W. Ott, 2009. |
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H3nrik V!
Joined: 15 Apr 2014
Posts: 1246
Location: Denmark
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| Posted: Tue Nov 13, 2018 8:11 am Post subject: |
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| Not a problem in my opinion. It is actually the preferred method in terms of EMC, which also leads to very good suppression of voltage ripple at those frequencies, where ESR is the lowest. |
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ph4nt0m
Joined: 01 Jan 2018
Posts: 812
Location: Europe
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| Posted: Tue Nov 13, 2018 9:09 am Post subject: |
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| The preferred methods are to use decoupling capacitors of different case size due to ESL or put series resistance to attenuate both peaks and valleys. Neither way is feasible in our case, so I'd just stick to identical capacitors. |
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asaggynoodle
Joined: 25 Mar 2019
Posts: 12
Location: St. Paul, MN, USA.
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| Posted: Tue Mar 26, 2019 1:10 pm Post subject: |
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| Couldn't you swap out the crystal (or replace with a trim pot crystal) on the PLL to get a more fine tuned overclock? Sure you'd break a lot of other stuff (probably PCI, any serial communication, etc) but you could get around most of the 75Mhz or 100Mhz FSB limitations? RAM would be a potential problem, but if you could lessen the timings? |
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Guest
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| Posted: Tue Mar 26, 2019 1:45 pm Post subject: |
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| I did it in the past by replacing the standard 14.318MHz crystal with a 16MHz one. Yeah, everything worked and was faster in fact, but... The system time was running into the future and all benchmarks showed the same scores. When I had enough fun, I put the original crystal back. |
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ph4nt0m
Joined: 01 Jan 2018
Posts: 812
Location: Europe
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| Posted: Tue Mar 26, 2019 1:46 pm Post subject: |
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^^ me
Logouts be damned. |
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