Pentium 4 505/505J/506 - difference being?

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H3nrik V!



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PostPosted: Tue Dec 01, 2020 6:46 am    Post subject: Pentium 4 505/505J/506 - difference being? Reply with quote

According to my own sheet, the difference between 505/505J and 506 should be that 506 is 64-bit capable, but it seems that at least SL85U has 64-bit capabilities? Is the EMT64 the difference between 505 and 505J? I thought it was a question of stepping and TDP?

So, what is the actual answer?
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Mixeur



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PostPosted: Tue Dec 01, 2020 6:48 am    Post subject: Reply with quote

505 & 505J, or any non-J vs J difference is the Execute Disable bit feature.
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H3nrik V!



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PostPosted: Tue Dec 01, 2020 7:01 am    Post subject: Reply with quote

Mixeur wrote:
505 & 505J, or any non-J vs J difference is the Execute Disable bit feature.

Oh, that makes sense.

But are 505 then EMT64 or not? Smile According to your website, they're not ..
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Mixeur



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PostPosted: Tue Dec 01, 2020 7:06 am    Post subject: Reply with quote

They should not. This is supposed to be THE difference between 505(J) & 506.
Please note that all 5x1 or 5x6 have Execute Disable Bit, despite the lack of J in the number.

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Mixeur



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PostPosted: Tue Dec 01, 2020 9:10 am    Post subject: Reply with quote

Xhoba has a SL85U and he tested it. So maybe he could confirm whether it has EM64T or not, but for me this is an error in CPU-World database.
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xhoba



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PostPosted: Tue Dec 01, 2020 10:25 am    Post subject: Reply with quote

Mixeur wrote:
Xhoba has a SL85U and he tested it. So maybe he could confirm whether it has EM64T or not, but for me this is an error in CPU-World database.


I confirm that my SL85U does'nt support EM64T.

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H3nrik V!



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PostPosted: Wed Dec 02, 2020 2:19 am    Post subject: Reply with quote

Thanks for the inputs Smile Who should we consult about the database error?
Actually, it seems that Intel also has that part wrong: https://ark.intel.com/content/www/us/en/ark/products/27450/intel-pentium-4-processor-505-505j-1m-cache-2-66-ghz-533-mhz-fsb.html
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H3nrik V!



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PostPosted: Wed Dec 02, 2020 2:23 am    Post subject: Reply with quote

Mixeur wrote:

Please note that all 5x1 or 5x6 have Execute Disable Bit, despite the lack of J in the number.

Yeah, and they also support EMT64, right?

What about all 6xx series - they're EMT64 with XD as well?
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xhoba



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PostPosted: Wed Dec 02, 2020 8:44 am    Post subject: Reply with quote

H3nrik V! wrote:
Mixeur wrote:

Please note that all 5x1 or 5x6 have Execute Disable Bit, despite the lack of J in the number.

Yeah, and they also support EMT64, right?

What about all 6xx series - they're EMT64 with XD as well?


Yes, every 6xx P4 support EMT64 and XD. I took as examples a 630 and a 631 I tested a couple of months ago.

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H3nrik V!



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PostPosted: Wed Dec 02, 2020 9:24 am    Post subject: Reply with quote

Oh, and now 631? What kind of sorcery is that now? Laughing

Oh, it's just my sheet, that doesn't go past Prescott, apparently Laughing
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Mixeur



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PostPosted: Wed Dec 02, 2020 10:37 am    Post subject: Reply with quote

6x1 are Cedar Mill cores P4s
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Mixeur



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PostPosted: Wed Dec 02, 2020 10:38 am    Post subject: Reply with quote

I made an article about the P4 naming convention, but it is in french only. Need to translate it in english.
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H3nrik V!



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PostPosted: Thu Dec 03, 2020 12:52 am    Post subject: Reply with quote

Mixeur wrote:
I made an article about the P4 naming convention, but it is in french only. Need to translate it in english.

It's actually pretty good with Google Translate Smile
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