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pinkie

Joined: 17 Sep 2005 Posts: 971 Location: Shenzhen,GD,China
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Posted: Tue Jun 20, 2006 10:41 am Post subject: Are they Sample? |
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I got some chips on last weekend.
I found the VIA C3 Antaur-M has an ES after SET but the C3 1.0AFHz do not has it, is this ES for engineering sample?
Is the ENG on the DIP chip for Engineering sample? anyone know about this chip? what brand is it?
Thank you !
Yan |
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CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
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Elar
Joined: 16 Jul 2003 Posts: 746 Location: Tallinn, Estonia
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Posted: Tue Jun 20, 2006 11:55 am Post subject: |
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| Judging by logo, it's Burroughs. |
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Mixeur

Joined: 06 Jan 2005 Posts: 4038 Location: Sochaux, France
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Posted: Tue Jun 20, 2006 11:57 am Post subject: |
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About SET marking (in fact, more likely SETG) on VIA EBGA cpus:
S = Indicates that M/B jumpers should be implemented to adjust the clock-ratio.
E = Indicates the Tc spec. of 85℃
T = Indicates termination on die
G (circled) : This part is made of lead-free materials. _________________ Register on x86-guide.net to manage and share your collection on-line !
Need to find a x86 ? Go to http://www.x86-guide.net ! Over 12000 chips listed ! |
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pinkie

Joined: 17 Sep 2005 Posts: 971 Location: Shenzhen,GD,China
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Posted: Tue Jun 20, 2006 6:57 pm Post subject: |
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Thanks all for information. _________________ Yan |
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pinkie

Joined: 17 Sep 2005 Posts: 971 Location: Shenzhen,GD,China
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Posted: Tue Jun 20, 2006 7:05 pm Post subject: |
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| CPUShack wrote: | the back of the VIA chips should be marked as well.
The antuar should be a ES
SET is a thermal/voltage spec I believe |
I have a VIA 1Giga_pro and C3-733 marked ES at back, but this antuar do not has the ES at back, so I don't know is an ES or not. |
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gshv

Joined: 01 Feb 2003 Posts: 7898 Location: Fairfax, VA USA
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Posted: Tue Jun 20, 2006 7:17 pm Post subject: |
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| pinkie wrote: | | I have a VIA 1Giga_pro and C3-733 marked ES at back, but this antuar do not has the ES at back, so I don't know is an ES or not. |
Can you post a picture of the back?
Gennadiy |
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pinkie

Joined: 17 Sep 2005 Posts: 971 Location: Shenzhen,GD,China
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Posted: Tue Jun 20, 2006 7:56 pm Post subject: |
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gshv

Joined: 01 Feb 2003 Posts: 7898 Location: Fairfax, VA USA
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Posted: Tue Jun 20, 2006 8:35 pm Post subject: |
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Well, the chips are not marked as 'ES' on the back, on the other side VIA C3 are not marked as 'ES' on the front. I think your Antaur-M chips are engineering samples.
Gennadiy |
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pinkie

Joined: 17 Sep 2005 Posts: 971 Location: Shenzhen,GD,China
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Posted: Tue Jun 20, 2006 10:28 pm Post subject: |
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Thanks Gennadiy for information. _________________ Yan |
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