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Marcin

Joined: 02 Jan 2005 Posts: 8519 Location: Poland
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Posted: Thu Feb 01, 2007 4:08 pm Post subject: RS64-IV |
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Who knows FSB for RS64-IV 600 Mhz CPU or 668 MHz version ? Can't find in google  _________________ Visit ABC CPU - Virtual CPU Museum. |
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doccybrown

Joined: 03 Oct 2005 Posts: 1736 Location: Germany
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Posted: Thu Feb 01, 2007 4:37 pm Post subject: |
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Hi Marcin,
I think it could be the value printed
on the oscillator I`ve marked!
Sometimes the oscillator feeds a
clock-chip which generates a
different clockspeed.
I am not sure if 'FSB' in this case
is the right name for it since it
was an invention by Intel.
I could imagine the bus is running
at full core clockspeed.
/Doccy _________________ Ordem e Progresso |
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ItsMeOnly

Joined: 06 Jun 2006 Posts: 173 Location: Warszawa, Poland
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Posted: Thu Feb 01, 2007 5:02 pm Post subject: |
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Hehehe, you know that's his board now?  |
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el_gecko

Joined: 25 May 2005 Posts: 1553 Location: Nice, France
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Posted: Thu Feb 01, 2007 5:30 pm Post subject: |
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| doccybrown wrote: | Hi Marcin,
I think it could be the value printed
on the oscillator I`ve marked!
Sometimes the oscillator feeds a
clock-chip which generates a
different clockspeed.
I am not sure if 'FSB' in this case
is the right name for it since it
was an invention by Intel.
I could imagine the bus is running
at full core clockspeed.
/Doccy |
Doccy, which of these chips is the RS CPU ? _________________ My microprocessor collection: The Gecko's CPU Library |
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pinkie

Joined: 17 Sep 2005 Posts: 971 Location: Shenzhen,GD,China
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Posted: Thu Feb 01, 2007 6:45 pm Post subject: |
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I think the dual core one is the RS CPU as many cache around it. _________________ Yan |
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Marcin

Joined: 02 Jan 2005 Posts: 8519 Location: Poland
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Posted: Fri Feb 02, 2007 1:40 am Post subject: |
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| doccybrown wrote: | Hi Marcin,
I think it could be the value printed
on the oscillator I`ve marked!
Sometimes the oscillator feeds a
clock-chip which generates a
different clockspeed.
I am not sure if 'FSB' in this case
is the right name for it since it
was an invention by Intel.
I could imagine the bus is running
at full core clockspeed.
/Doccy |
Thanks Andree, will check that oscillator. CPU is desoldered and board is in cartoon with scrap electronic  _________________ Visit ABC CPU - Virtual CPU Museum. |
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ItsMeOnly

Joined: 06 Jun 2006 Posts: 173 Location: Warszawa, Poland
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Posted: Fri Feb 02, 2007 7:43 am Post subject: |
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| pinkie wrote: | | I think the dual core one is the RS CPU as many cache around it. |
Correct, that's master board from 6-way module, the slave contains another two "paths" with Voltage Regulator, cache and two 2-core RS chips.
The LGA thingy on the left is peculiar bus connector of these two- I kept the contact board. |
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el_gecko

Joined: 25 May 2005 Posts: 1553 Location: Nice, France
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Posted: Fri Feb 02, 2007 9:39 am Post subject: |
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Anyone would like to trade one ?  _________________ My microprocessor collection: The Gecko's CPU Library |
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Marcin

Joined: 02 Jan 2005 Posts: 8519 Location: Poland
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doccybrown

Joined: 03 Oct 2005 Posts: 1736 Location: Germany
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Posted: Fri Feb 02, 2007 12:11 pm Post subject: |
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Are you sure it is not a 750MHz board?
750 / 12 = 62.5 _________________ Ordem e Progresso |
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Marcin

Joined: 02 Jan 2005 Posts: 8519 Location: Poland
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Posted: Fri Feb 02, 2007 12:33 pm Post subject: |
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| doccybrown wrote: | Are you sure it is not a 750MHz board?
750 / 12 = 62.5 |
Ask Itsonlyme _________________ Visit ABC CPU - Virtual CPU Museum. |
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doccybrown

Joined: 03 Oct 2005 Posts: 1736 Location: Germany
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Posted: Fri Feb 02, 2007 1:47 pm Post subject: |
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Heureka!
Found this:
Memory Controller
A single custom chip provides the function of the memory controller
and the I/O hub in the Model 6F1. The controller chip provides
interfaces to processors, memory, and the I/O subsystem.
The RS64 IV processors on the processor boards are connected
to the memory controller through the PowerPC 6xx bus.
The controller chip is a part of the first processor board.
The memory controller provides a single 6xx bus interface in a
single processor configuration. For 2-way SMP configurations,
the controller provides a 6xx bus interface to the pair of RS64 IV
processors present in the same board. The memory controller
provides another 6xx bus interface for CPU expansion using an
additional processor board. The 4- and 6-way SMP configurations
consists of a total of two processor boards that use the two 6xx
bus interfaces provided by the memory controller installed
together in a book.
In the Model 6F1, the 6xx bus is a 16-byte wide bus, the operating
clock rate of which depends on the processor clock speed.
The 6xx bus operates at a clock rate of 150 MHz when the processor
clock speed is 600 MHz. For a processor clock speed of 668 MHz,
the 6xx bus operates at a clock rate of 133.6 MHz.
Source:
www.ibm.com/jp/servers/eserver/pseries/hardware/whitepaper/70256f1.pdf _________________ Ordem e Progresso |
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Marcin

Joined: 02 Jan 2005 Posts: 8519 Location: Poland
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