| View previous topic :: View next topic |
| Author |
Message |
ghost Guest
|
Posted: Wed Oct 25, 2006 6:29 pm Post subject: POWER6 |
|
|
| Does anyone have any information about the upcoming POWER6 family? |
|
| Back to top |
|
 |
CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
|
|
| Back to top |
|
 |
slava

Joined: 24 Jul 2005 Posts: 379 Location: Dnipro, Ukraine
|
Posted: Sat Oct 28, 2006 12:36 am Post subject: |
|
|
LOL
... and Apple now uses Pentiums  _________________ Collecting soviet and western CPUs once again -- highfive to old-timers o/ |
|
| Back to top |
|
 |
Guest
|
Posted: Sat Oct 28, 2006 3:29 am Post subject: |
|
|
Yep apple suck.
I dont know why you'd move away from a full RISC based machine to CISC?? Do they want market share that badly???
I've deployed a few of the Mac Pro's at work, there not bad.... but they still under perform the PPC versions which are almost 3 years old.
---------------------------------------------
X86 =< PPC |
|
| Back to top |
|
 |
CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
|
|
| Back to top |
|
 |
Marcin

Joined: 02 Jan 2005 Posts: 8519 Location: Poland
|
|
| Back to top |
|
 |
Guest
|
Posted: Sun Oct 29, 2006 9:38 am Post subject: |
|
|
Ah no, Intel processors use a hybrid CISC/RISC architecture. Interally they process RISC base instructions but a CISC/RISC decoder is used to convert the frontside operation which only accpets CISC instructions.
This is done for compatibility with the x86 architecture. Something which AMD also does. |
|
| Back to top |
|
 |
chip68

Joined: 19 Oct 2004 Posts: 1024 Location: Central Pennsylvania
|
Posted: Sun Oct 29, 2006 10:24 am Post subject: |
|
|
| Anonymous wrote: | | Do they want market share that badly??? |
This is Steve Jobs we're talking about... So, YES.
- CMW |
|
| Back to top |
|
 |
CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
|
Posted: Sun Oct 29, 2006 3:37 pm Post subject: |
|
|
| Anonymous wrote: | Ah no, Intel processors use a hybrid CISC/RISC architecture. Interally they process RISC base instructions but a CISC/RISC decoder is used to convert the frontside operation which only accpets CISC instructions.
This is done for compatibility with the x86 architecture. Something which AMD also does. |
yup, but the CPU remains a RISC architecture regardless.
the translation (into a series of RISC uOPs ) is rather seemless, and actually hels speed up execution of alot of things, as the decoder can decode things in a way to best use the available pipelines (each CISC instruction can be broken down into several different (but same output wise) uOPs series.) _________________ New for 2025! The CPU Shack has a co-processor!
Visit The CPU Shack of microprocessor history and information. |
|
| Back to top |
|
 |
Root

Joined: 11 Mar 2006 Posts: 64
|
Posted: Sun Oct 29, 2006 5:31 pm Post subject: |
|
|
| Quote: | | yup, but the CPU remains a RISC architecture regardless. |
We must examine CPU in all aspects. In this point of view, modern x86 CPUs aren't pure RISC, but CISC with RISC-core.
| Quote: | | each CISC instruction can be broken down into several different (but same output wise) uOPs series.) |
There is only one reason for holding CISC instruction set - compatibility with older software. Perfomance will be better if CPU will be pure RISC with good written programs.
So I agree with Guest _________________ FreeBSD - forever |
|
| Back to top |
|
 |
CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
|
Posted: Sun Oct 29, 2006 7:08 pm Post subject: |
|
|
sure, but POWER6 is by far not pure RISC either (very few modern RISC CPU's truly are. they have a very large selection of instructions, and often do not have basic features that make RISC RISC (such as fixed instruction length, and pure load/store architecture.) _________________ New for 2025! The CPU Shack has a co-processor!
Visit The CPU Shack of microprocessor history and information. |
|
| Back to top |
|
 |
Guest
|
Posted: Mon Oct 30, 2006 3:17 am Post subject: |
|
|
| Why don't 'YOU' consider it RISC? |
|
| Back to top |
|
 |
Root

Joined: 11 Mar 2006 Posts: 64
|
Posted: Tue Oct 31, 2006 8:21 pm Post subject: |
|
|
As I remember newest PowerPC has
a) instruction with fixed length
b) a lot of registers in opposite to classical x86.
...
z) IBM said that PowePC is RISC. I think that they have reasons for it.
So we can consider it as RISC  _________________ FreeBSD - forever |
|
| Back to top |
|
 |
CPUShack

Joined: 16 Jun 2003 Posts: 34259 Location: State of Jefferson, USA
|
|
| Back to top |
|
 |
Guest
|
Posted: Fri Nov 03, 2006 5:11 am Post subject: |
|
|
But it is a truth RISC based procesors, I mean unless you know more about RISC then IBM does...
has something to do with POWER (Performance Optimization With Enhanced RISC)???
 |
|
| Back to top |
|
 |
|